This looks great! I was disappointed when Logisim was discontinued but it's good to see there are a number of clones or forks of it now being developed.
BUT, I've been using Logisim-Evolution, and it is very nice. An expansion of Logisim that, among other things, does VHDL/Verilog and supports a lot of FPGA boards.
>"o Contains a library with the most commonly used 74xx series integrated circuits.
[...]
o Good performance: The example processor can be clocked at 120 kHz.
[...]
o A circuit can be exported to VHDL or Verilog. There is also direct support for the BASYS3 Board and the TinyFPGA BX board. See the documentation for details. The examples folder contains a variant of the example CPU, which runs on a BASYS3 board."
sorry i'm a newb in this space (getting into fpga dev through chisel): is this basically ltspice? or is it more powerful? i'm guessing it's more powerful because you can specify asics using vhdl/verilog and you can also export the entire circuit (netlist?) to vhdl/verilog. basically i'm wondering if i can use this to start to understand verilog/vhdl since it could function is a graphical frontend. i'm also wondering if there's more mature tool for that same purpose.
Spice is primarily an analogue simulator. It can handle audio amplifiers just as well as simulating digital logic circuits.
Digital, as the name implies, doesn't deal with the analogue at all, it's a graphical logic simulator. Step-based, fixed signal values like 1, 0, not connected, high-impedance. Think visual Verilog, except somewhat limited.
There is some support in Digital for defining component behaviour in Verilog or VHDL. Once defined, you will get a graphic symbol you can put in your diagram, and all the wires will behave as specified in the code. It's also possible to translate a schematic in the software to Verilog or VHDL code.
Because of that, I do think it would be a good stepping stone to learning more about logic and hardware description languages. I've recommended it before to people who want to learn the basics. But it's still new, has some limits, and I don't think it would scale well to a large project.
Been a while since I've been running this, but you can patch something together with GHDL [0] (or Xilinx's simulation suite (ISim)).
Define your circuit with VHDL/Verilog, create a testbench, run the scripts and export to VCD, and then look at the waveforms with GTKwave [1] or your waveform viewer of choice.
The fastest open source general digital logic simulator I'm aware off is Verilator, but obviously the speed of simulation depends greatly on the design and whether you are also generating wave forms (for offline viewing)
There is also Logisim-Evolution, which also supports VHDL/Verilog and FPGA export.